The number of gates in the original truth table of the arithmetic logic unit before the AND and OR gate simplification is approximately equivalent to the memory unit. The two inputs of the original truth table are used as the two-dimensional address of the memory module to store the output. After the address is read, it is equivalent to two inputs and one output. This is the so-called "memory operator". For a single fixed-function operator, it is impossible to use this method consuming the largest number of gates without simplification. However, if we look at the fixed function, the virtual wiring complexity between operators that can only be fixedly placed has consumed more memory units than the memory consumption that can be rewritten and freely placed to reduce the complexity of virtual wiring. It is cost-effective. Another method of content addressing rather than numerical decoder addressing is to use the comparison gate array to parallelly compare the content that matches the input and get the content next to it as the output. When the number of units is large enough, the number of gates consumed by the numerical address decoder exceeds the number of gates consumed by the parallel content comparison. In addition, the numerical address decoding method can only determine one address, while the content comparison method can simultaneously connect many to many. It can be seen that in dynamic logic operations, storage and computing integration are more cost-effective, and the traditional neural network operators are fixed nearby without addressing problems, which is more suitable for traditional storage and computing integration. If the dynamic neural network has a dynamic connection between neurons that changes instead of being fixed, it is more suitable for this approach. Of course, the ultimate storage and computing integration is that the semiconductor itself is a non-volatile memory instead of adding another memory next to it to remember the switch state.