The travelers in the graph processor

The new graph processor uses the travelers to replace the program counters in the old sequential processor. 

The travelers in the graph machine are not the address registers in the old sequential processor, they are the node markers shifting through the switches network.

Subgraph = class

There are several the same subgraphs in a large graph can be overlapped to be only one in the memory as a class, and then the boundaries between the overlapped subgraph and the large graph holes formed after the subgraphs cutted can be regarded as the instances of this class.

There may also be several the same subgraphs in a subgraph. Travelers remember one more boundary each time crossing a boundary into a subgraph, and forget the last added boundary when exiting a subgraph. Via these remembered boundaries, the travelers from different instances can go back where they came after they leave the class traveling. 

It is possible to have different subgraph within an overlapped graph, in this condition, there are several different boundaries at the same place.

The collection graph in the Sense graph

There is no container class of the traditional object system because the collection graph in the sense graph already has satisfied originally.

Ne plu fiksaj skatoloj

Ĉiuj ujoj estos dinamike kunvenitaj el la universalaj teleroj.

Magnetic attracting tight closure without screw thread

New software making way wanted

The traditional way of making software is to write a whole document and hand it over to the compiler to convert to a sequence of instruction codes. 

What we want is to generate and modify the software in frequent interactive conversations during runtime. 

The software is composed of Senses. 

Everything is Sense, all time is runtime.

The ports of the Sense Graph chip

There are two basic interfaces among the Sense Graph chips:

1. sentences stream conversation port 

2. data flow channel ports connecting the switches network across chips 

Compare with the memory address output port and the instruction / data port of the traditional stack processor.